Electronic package and fabrication method thereof

ABSTRACT

An electronic device package and manufacturing method are provided, including steps of: providing a carrier having at least an electronic element and at least a package block disposed thereon, wherein the package block has a plurality of conductive posts bonded to the carrier; forming an encapsulant on the carrier for encapsulating the electronic element and the package block; and removing the carrier so as to expose the electronic element and the conductive posts from a surface of the encapsulant. As such, the invention dispenses with formation of through holes in the encapsulant for forming the conductive posts as in the prior art, thereby saving the fabrication cost.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to packaging processes, and moreparticularly, to an electronic package having an electronic elementembedded therein and a fabrication method thereof.

2. Description of Related Art

Along with the progress of semiconductor packaging technologies, variouspackage types have been developed for semiconductor devices. To improveelectrical performance and save space, a plurality of packages can bestacked to form a package on package (PoP) structure, for example, a fanout package on package (FO PoP) structure, thereby greatly increasingI/O count and integrating integrated circuits having differentfunctions. Such a packaging method allows merging of heterogeneoustechnologies in a system-in-package (SiP) so as to systematicallyintegrate a plurality of electronic elements having different functions,such as a memory, a CPU (Central Processing Unit), a GPU (GraphicsProcessing Unit), an image application processor and so on, andtherefore is applicable to various thin type electronic products.

FIGS. 1A to 1F are schematic cross-sectional views showing a method forfabricating a semiconductor package 1 of a PoP structure according tothe prior art.

Referring to FIG. 1A, a semiconductor element 10 such as a chip isdisposed on a release layer 110 of a first carrier 11, and then anencapsulant 13 is formed on the release layer 110 to encapsulate thesemiconductor element 10.

Referring to FIG. 1B, a second carrier 12 having a copper foil 120 isdisposed on the encapsulant 13.

Referring to FIG. 1C, the first carrier 11 and the release layer 110 areremoved to expose the electronic element 10 and the encapsulant 13.

Referring to FIG. 1D, a plurality of through holes 130 are formed bylaser drilling in the encapsulant 13 around a periphery of theelectronic element 10.

Referring to FIG. 1E, a conductive material is filled in the throughholes 130 to form a plurality of conductive posts 14. Further, aplurality of redistribution layers (RDLs) 15 are formed on theencapsulant 13 and electrically connected to the conductive posts 14 andthe electronic element 10.

Referring to FIG. 1F, the second carrier 12 is removed and a patterningprocess is performed on the copper foil 120 to form a circuit structure16. Then, a singulation process is performed to obtain an electronicpackage 1.

However, the laser drilling process for forming the through holes 130can easily destroy the copper foil 120 and consequently adversely affectthe quality of the circuit structure 16. Further, the laser drillingprocess is quite slow and time-consuming, especially when the number ofthe through holes is large. Furthermore, residue (generated from such asthe encapsulant 13 or the copper material) easily accumulates on thebottom of the through holes 130. Accordingly, a cleaning process isrequired before filling of the conductive material in the through holes130, thus increasing the number of fabrication steps and the fabricationcost.

In addition, if the through holes 130 have a high aspect ratio, it willbecome difficult to completely remove the residue in the through holes130. As such, the electrical transmission performance of the conductiveposts 14 may be adversely affected by the remaining residue.

Further, the laser drilling process results in uneven wall surfaces ofthe through holes 130. As such, during a subsequent electroplatingprocess, the conductive material cannot be effectively attached to thewall surfaces of the through holes 130 and easily delaminates therefrom,thus reducing the product reliability of the semiconductor package 1.

Also, a laser beam used in the laser drilling process produces a heataffected zone. That is, if the position of the through holes 130 isclose to the semiconductor element 10, high heat from the laser beamwill damage the semiconductor element 10. Therefore, a certain distancemust be kept between the conductive posts 14 and the semiconductorelement 10, thus hindering miniaturization of the semiconductor package1.

Therefore, there is a need to provide an electronic package and afabrication method thereof so as to overcome the above-describeddrawbacks.

SUMMARY OF THE INVENTION

In view of the above-described drawbacks, the present invention providesan electronic package, which comprises: an encapsulant having a firstsurface and a second surface opposite to the first surface; at least anelectronic element embedded in the encapsulant and exposed from thefirst surface of the encapsulant; and at least a package block embeddedin the encapsulant and having at least one conductive post exposed fromthe first surface of the encapsulant.

The present invention further provides a method for fabricating anelectronic package, which comprises the steps of: providing a carrierhaving at least an electronic element and at least a package blockdisposed thereon, wherein the package block has at least one conductivepost bonded to the carrier; forming an encapsulant on the carrier forencapsulating the electronic element and the package block, wherein theencapsulant has a first surface and a second surface opposite to thefirst surface; and removing the carrier so as to expose the electronicelement and the conductive posts from the first surface of theencapsulant.

In the above-described method, fabricating the package block cancomprise: providing a metal board having at least one conductive postthereon; forming an encapsulant on the metal board to encapsulate theconductive post; and removing the metal board, thereby forming thepackage block having the conductive post exposed from a surface thereof.

In the above-described method, the encapsulant can be formed by moldingor lamination.

In the above-described package and method, the encapsulant and thepackage block can be made of the same or different materials.

In the above-described package and method, the electronic element canfurther be exposed from the second surface of the encapsulant.

In the above-described package and method, a shielding layer can beformed on the electronic element. For example, the shielding layer isexposed from the second surface of the encapsulant.

In the above-described package and method, the conductive post canfurther be exposed from the second surface of the encapsulant.Furthermore, a circuit structure can be on formed on the second surfaceof the encapsulant and electrically connected to the conductive post.

In the above-described package and method, a circuit structure canfurther be formed on the first surface of the encapsulant andelectrically connected to the electronic element and the conductivepost.

According to the present invention, the package block having theconductive post are fabricated first and then the encapsulant is formedto encapsulate the package block. As such, the present inventiondispenses with the conventional processes for forming the conductivepost in the encapsulant, for example, a laser drilling process forforming through holes in the encapsulant, a cleaning process forcleaning the through holes, and an electroplating process for fillingthe through holes with a conductive material. Therefore, the presentinvention saves the fabrication time, improves the electricaltransmission performance of the conductive posts and avoids theconventional drawback of delamination of the conductive posts fromuneven wall surfaces of the through holes, thereby improving thereliability of the electronic package.

Further, by dispensing with the laser drilling process, the presentinvention avoids formation of a heat affected zone and hence allows theconductive posts or the package block to be positioned close to theelectronic element according to the practical need. Therefore, the sizeof the electronic package can be reduced to meet the miniaturizationrequirement.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A and 1F are schematic cross-sectional views showing a method forfabricating a semiconductor package according to the prior art;

FIGS. 2A to 2G are schematic cross-sectional views showing a method forfabricating an electronic package according to the present invention,wherein FIG. 2D′ is a schematic upper view of FIG. 2D, FIGS. 2F′ and 2F″show other embodiments of FIG. 2F, and FIGS. 2G′ and 2G″ show otherembodiments of FIG. 2G; and

FIGS. 3 and 3′ are schematic cross-sectional views showing otherembodiments of FIG. 2G″.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

The following illustrative embodiments are provided to illustrate thedisclosure of the present invention, these and other advantages andeffects can be apparent to those in the art after reading thisspecification.

It should be noted that all the drawings are not intended to limit thepresent invention. Various modifications and variations can be madewithout departing from the spirit of the present invention. Further,terms such as “first”, “second”, “on”, “a” etc. are merely forillustrative purposes and should not be construed to limit the scope ofthe present invention.

FIGS. 2A to 2G are schematic cross-sectional views showing a method forfabricating an electronic package 2 according to the present invention.

Referring to FIG. 2A, a metal board 24′ having a plurality of conductiveposts 24 thereon is provided.

In the present embodiment, the metal board 24′ and the conductive posts24 are integrally formed. For example, a copper substrate is patternedby laser, mechanical drilling, etching or the like so as to form themetal board 24′ having the conductive posts 24.

In other embodiments, the metal board 24′ and the conductive posts 24are not integrally formed. For example, the conductive posts 24 areformed on the metal board 24′ by electroplating.

Referring to FIG. 2B, an encapsulant 22′ is formed on the metal board24′ to encapsulate the conductive posts 24.

In the present embodiment, the encapsulant 22′ is formed by, forexample, resin molding, dry film lamination, coating or printing.

Referring to FIG. 2C, the metal board 24′ is removed, thereby forming apackage block 22″.

In the present embodiment, each of the conductive posts 24 has a firstend surface 24 a flush with and exposed from a surface of the packageblock 22″ and a second end surface 24 b opposite to the first endsurface 24 a.

According to the practical need, the package block 22″ can be cut alongcutting paths L so as to obtain a plurality of small-sized packageblocks 22.

Referring to FIG. 2D, an electronic element 21 and a plurality ofpackage blocks 22 are disposed on a carrier 20 with the conductive posts24 bonded to the carrier 20.

In the present embodiment, the carrier 20 is a board made of, forexample, a semiconductor material, a dielectric material, a ceramicmaterial, glass or metal. The carrier 20 can correspond in size to awafer type substrate or a panel type substrate.

A bonding layer (not shown) made of such as a release film, an adhesivematerial or an insulating material can be formed on the carrier 20 bycoating or adhering for bonding with the electronic element 21 and thepackage blocks 22, and the first end surfaces 24 a of the conductiveposts 24 are in contact with the bonding layer.

The electronic element 21 is an active element such as a semiconductorchip, a passive element such as a resistor, a capacitor or an inductor,or a combination thereof. In particular, the electronic element 21 hasan active surface 21 a with a plurality of electrode pads 210 and anon-active surface 21 b opposite to the active surface 21 a, and theelectronic element 21 is bonded to the bonding layer via the activesurface 21 a thereof.

Referring to FIG. 2D′, the package blocks 22 are arranged adjacent tothe electronic element 21.

Referring to FIG. 2E, an encapsulant 23 is formed on the carrier 20 toencapsulate the electronic element 21 and the package blocks 22.

In the present embodiment, the encapsulant 23 has a first surface 23 aand a second surface 23 b opposite to the first surface 23 a, and theencapsulant 23 is bonded to the bonding layer of the carrier 20 via thefirst surface 23 a thereof.

The encapsulant 23 covers the non-active surface 21 b of the electronicelement 21 and the upper portions of the package blocks 22.

The encapsulant 23 is made of an insulating material such as a liquidcompound, and formed by injection, lamination or molding.

The encapsulant 23 and the package blocks 22 can be made of the same ordifferent materials.

Referring to FIG. 2F, the carrier 20 and the bonding layer are removedto expose the first surface 23 a of the encapsulant 23 and the packageblocks 22. As such, the active surface 21 a of the electronic element 21and the first end surfaces 24 a of the conductive posts 24 are exposedfrom the first surface 23 a of the encapsulant 23.

Further, a thinning process can be performed according to the practicalneed. Referring to FIG. 2F′, a thinning process is performed on thesecond surface 23 b of the encapsulant 23 so as to expose a non-activesurface 21 b′ of the electronic element 21 and second end surfaces 24 b′of the conductive posts 24 from a second surface 23 b′ of theencapsulant 23. Alternatively, referring to FIG. 2F″, only the secondend surfaces 24 b′ of the conductive posts 24 are exposed from thesecond surface 23 b′ of the encapsulant 23.

Referring to FIG. 2G, continued from FIG. 2F, a first circuit structure25 is formed on the first surface 23 a of the encapsulant 23 andelectrically connected to the electrode pads 210 of the electronicelement 21 and the first end surfaces 24 a of the conductive posts 24.Thereafter, a singulation process can be performed according to thepractical need.

In the present embodiment, the circuit structure 25 has an insulatingbody 250 made of, for example, a dielectric material or a solder maskmaterial, and at least a redistribution layer 251 embedded in theinsulating body 250. The innermost redistribution layer 251 iselectrically connected to the electrode pads 210 of the electronicelement 21 and the conductive posts 24, and a plurality of conductiveelements 26 made of such as metal posts or a solder material are formedon the outermost redistribution layer 251 for mounting anotherelectronic element 29 such as a passive element. Alternatively,referring to FIG. 2G′, an electronic device 9 such as a circuit board ismounted on the conductive elements 26.

If the process is continued from FIG. 2F′, an electronic package 2′ ofFIG. 2G′ is obtained.

In another embodiment, referring to FIG. 2G″, the encapsulant 23encapsulates a plurality of electronic elements 21, and a second circuitstructure 27 is formed on the second surface 23 b′ of the encapsulant 23and electrically connected to the conductive posts 24. The circuitstructure 27 has an insulating body 270 made of, for example, adielectric material or a solder mask material, and at least aredistribution layer 271 electrically connected to the conductive posts24. Further, a plurality of conductive elements 28 made of such as metalposts or a solder material are formed on the redistribution layer 271.

Subsequently, an electronic device is stacked on the second surface 23b, 23 b′ of the encapsulant 23 so as to form a stack-type packagestructure. In particular, referring to FIG. 2G″, an electronic device 3is disposed on the electronic package 2″ through the conductive elements28 on the second circuit structure 27.

In the present embodiment, the electronic device 3 is a package, a chipor a substrate. The electronic device 3 can have a wire-bonding typechip 31 or a flip-chip type chip.

In an embodiment, referring to FIG. 3, the non-active surface 21 b′ ofthe electronic element 21 is exposed from the second surface 23 b′ ofthe encapsulant 23, and a shielding layer 272 is formed on thenon-active surface 21 b′ of the electronic element 21 during formationof the redistribution layer 271 of the second circuit structure 27. Theshielding layer 272 is electrically grounded through a portion of theredistribution layer 271 for EMI (electromagnetic interference)shielding.

In another embodiment, referring to FIG. 3′, a metal sheet is disposedon the non-active surface 21 b of the electronic element 21 to serve asa shielding layer 40, and the shielding layer 40 is flush with andexposed from the second surface 23 b′ of the encapsulant 23. Then, asecond circuit structure 27′ is formed on the second surface 23 b′ ofthe encapsulant 23 and electrically connected to the conductive posts24. For example, the circuit structure 27′ has an insulating body 270′made of such as a dielectric material or a solder mask material and aplurality of redistribution layers 271′ electrically connected to theconductive posts 24, and the shielding layer 40 is electrically groundedthrough a portion of the redistribution layers 271′.

According to the present invention, the package blocks 22 having theconductive posts 24 are fabricated first and then the encapsulant 23 isformed to encapsulate the package blocks 22. As such, the presentinvention dispenses with the conventional processes for forming theconductive posts in the encapsulant, for example, a laser drillingprocess for forming through holes in the encapsulant, a cleaning processfor cleaning the through holes, and an electroplating process forfilling the through holes with a conductive material. Therefore, thepresent invention saves the fabrication time, improves the electricaltransmission performance of the conductive posts 24 and avoids theconventional drawback of delamination of the conductive posts 24 fromuneven wall surfaces of the through holes, thereby improving thereliability of the electronic package 2, 2′, 2″, 4, 4′.

Further, by dispensing with the laser drilling process, the presentinvention avoids formation of a heat affected zone and hence allows theconductive posts 24 or the package blocks 22 to be positioned close tothe electronic element 21 according to the practical need. Therefore,the size of the electronic package 2, 2′, 2″, 4, 4′ can be reduced tomeet the miniaturization requirement.

The present invention further provides an electronic package 2, 2′, 2″,4, 4′, which has: an encapsulant 23 having a first surface 23 a and asecond surface 23 b, 23 b′ opposite to the first surface 23 a; at leastan electronic element 21 embedded in the encapsulant 23 and exposed fromthe first surface 23 a of the encapsulant 23; and at least a packageblock 22 embedded in the encapsulant 23 and having a plurality ofconductive posts 24 exposed from the first surface 23 a of theencapsulant 23.

In an embodiment, an active surface 21 a of the electronic element 21 isflush with the first surface 23 a of the encapsulant 23.

In an embodiment, each of the conductive posts 24 has a first endsurface 24 a flush with the first surface 23 a of the encapsulant 23 anda second end surface 24 b, 24 b′ opposite to the first end surface 24 a.

In an embodiment, the encapsulant 23 and the package block 22 are madeof the same or different materials.

In an embodiment, the electronic element 21 is further exposed from thesecond surface 23 b′ of the encapsulant 23. For example, a non-activesurface 21 b′ of the electronic element 21 is flush with the secondsurface 23 b′ of the encapsulant 23.

In an embodiment, a shielding layer 272, 40 is formed on the non-activesurface 21 b, 21 b′ of the electronic element 21 and exposed from thesecond surface 23 b′ of the encapsulant 23.

In an embodiment, the conductive posts 24 are further exposed from thesecond surface 23 b′ of the encapsulant 23. For example, the second endsurfaces 24 b′ of the conductive posts 24 are flush with the secondsurface 23 b′ of the encapsulant 23. Further, a second circuit structure27, 27′ is formed on the second surface 23 b′ of the encapsulant 23 andelectrically connected to the conductive posts 24.

In an embodiment, a first circuit structure 25 is further formed on thefirst surface 23 a of the encapsulant 23 and electrically connected tothe electronic element 21 and the conductive posts 24. For example, thefirst circuit structure 25 has at least a redistribution layer 251electrically connected to the electronic element 21 and the conductiveposts 24.

According to the present invention, the package block having theconductive posts are fabricated first and then the encapsulant is formedto encapsulate the package block. Therefore, the present inventiondispenses with the conventional laser drilling process so as to simplifythe fabrication process, reduce the fabrication time and cost, improvethe reliability of the electronic package and reduce the size of theelectronic package.

The above-described descriptions of the detailed embodiments are only toillustrate the preferred implementation according to the presentinvention, and it is not to limit the scope of the present invention.Accordingly, all modifications and variations completed by those withordinary skill in the art should fall within the scope of presentinvention defined by the appended claims.

What is claimed is:
 1. An electronic package, comprising: an encapsulanthaving a first surface and a second surface opposite to the firstsurface; at least an electronic element embedded in the encapsulant andexposed from the first surface of the encapsulant; and at least apackage block embedded in the encapsulant and having at least oneconductive post exposed from the first surface of the encapsulant. 2.The electronic package of claim 1, wherein the encapsulant and thepackage block are made of the same or different materials.
 3. Theelectronic package of claim 1, wherein the electronic element is furtherexposed from the second surface of the encapsulant.
 4. The electronicpackage of claim 1, wherein a shielding layer is formed on theelectronic element.
 5. The electronic package of claim 4, wherein theshielding layer is exposed from the second surface of the encapsulant.6. The electronic package of claim 1, wherein the conductive post isfurther exposed from the second surface of the encapsulant.
 7. Theelectronic package of claim 6, further comprising a circuit structureformed on the second surface of the encapsulant and electricallyconnected to the conductive posts.
 8. The electronic package of claim 1,further comprising a circuit structure formed on the first surface ofthe encapsulant and electrically connected to the electronic element andthe conductive post.
 9. A method for fabricating an electronic package,comprising the steps of: providing a carrier having at least anelectronic element and at least a package block disposed thereon,wherein the package block has at least one conductive post bonded to thecarrier; forming an encapsulant on the carrier for encapsulating theelectronic element and the package block, wherein the encapsulant has afirst surface and a second surface opposite to the first surface; andremoving the carrier so as to expose the electronic element and theconductive post from the first surface of the encapsulant.
 10. Themethod of claim 9, wherein fabricating the package block comprises:providing a metal board having at least one conductive post thereon;forming an encapsulant on the metal board to encapsulate the conductivepost; and removing the metal board, thereby forming the package blockhaving the conductive post exposed from a surface thereof.
 11. Themethod of claim 9, wherein the encapsulant is formed by molding orlamination.
 12. The method of claim 9, wherein the encapsulant and thepackage block are made of the same or different materials.
 13. Themethod of claim 9, wherein the electronic element is further exposedfrom the second surface of the encapsulant.
 14. The method of claim 9,wherein a shielding layer is formed on the electronic element.
 15. Themethod of claim 14, wherein the shielding layer is exposed from thesecond surface of the encapsulant.
 16. The method of claim 9, whereinthe conductive post is further exposed from the second surface of theencapsulant.
 17. The method of claim 16, further comprising forming onthe second surface of the encapsulant a circuit structure electricallyconnected to the conductive post.
 18. The method of claim 9, furthercomprising forming on the first surface of the encapsulant a circuitstructure electrically connected to the electronic element and theconductive post.